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Concept Engineering Introduces RTLvision(TM) PRO to Help Designers of IP-based System-on-Chip Reach Faster RTL Code Closure; New RTL Debugging Tool Supports SystemVerilog, Verilog and VHDL Standard Languages
FREIBURG, Germany—(BUSINESS WIRE)—July 6, 2006—
Concept Engineering today announced the release of
RTLvision(TM) PRO, a customizable tool to help designers of
intellectual property (IP)-based system-on-chip reduce the complexity
of the debug process and makes it easier to understand and change
register-transfer level (RTL) code. With the addition of RTLvision PRO
to Concept Engineering's product line, the company now offers
interactive visualization and debugging tools for all major design
levels: RTL-level, gate-level and transistor-level.
Integrated circuit (IC), SoC, and field programmable gate array
(FPGA) design and verification engineers who develop, integrate and
debug RTL code and IP components are facing increasing productivity
pressure as designs become more complex and challenging. Designers
often alleviate this pressure by using IP-based SoC design methods.
RTLvision PRO allows these designers to quickly understand, integrate
and debug third-party or "inherited" IP.
"For RTL designers, code is what really counts," said Gerhard
Angst, president and CEO of Concept Engineering. "We have capitalized
on our long experience in gate-level and transistor-level debugging to
provide these designers with a very fast and innovative link between
code and interactive graphic fragments."
RTLvision PRO helps engineers reach faster RTL code closure by
enabling quick visualization of critical design fragments and easy
understanding of design behavior and design miss behavior. With
mixed-language support for System Verilog, Verilog and VHDL and
ultra-fast HDL readers, RTLvision PRO can be used on today's most
complex heterogeneous designs. This easy-to-use, high-performance tool
helps reduce the complexity of the debug process via its interactive
logic cone navigation feature, which shows just the critical portion
of the RTL design in the logic cone window while concurrently
providing links to the original source code. As a result, engineers
can easily work on the important critical fragments of their RTL
project without being disturbed by code and graphics not relevant for
the job at hand.
RTLvision PRO also:
-- Automatically extracts and analyzes clock trees and clock
domains.
-- Supports detection and resolution of clock domain problems.
-- Allows incremental design compilation for very fast design
update.
-- Provides a tcl-based UserWare application programming
interface (API) that allows highly flexible customization,
allowing the designer to extend the functionality of RTLvision
PRO to meet the immediate needs of the project.
Pricing and Availability
Free evaluation packages for RTLvision PRO are available from
Concept Engineering's website at www.concept.de. Initial product
demonstrations will be provided in Concept Engineering's booth #720 at
the Design Automation Conference (DAC) 2006 in San Francisco's Moscone
Center from July 24 through 27, 2006. US list pricing for a one-year
time-based license starts at $5K.
About Concept Engineering
Concept Engineering, a privately held company based in Freiburg,
Germany, was founded in 1990 to develop and market innovative
schematic generation and viewing technology for use with logic
synthesis, verification, test automation and physical design tools.
The company's customers are primarily original equipment EDA tool
manufacturers (OEMs), in-house CAD tool developers and semiconductor
companies. The company is located at Boetzinger Str. 29, D-79111
Freiburg, Germany. Telephone: +49-761-47094-0, Fax: +49-761-47094-29,
http://www.concept.de
Contact:
Concept Engineering
Gerhard Angst, +49-761-47094-0
Email Contact
or
Cayenne Communication LLC
Michelle Clancy, 252-940-0981
Email Contact
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